1. Field of the Invention
The present invention relates to a method for extracting bits with minimal errors from a modulated waveform by using information from the entire transmitted data block to remove intersymbol interference from the decoded data.
2. Description of Related Art
Digital signal processing (DSP) refers to the various techniques for improving the accuracy and reliability of digital communications. The developed theories and mathematical solutions behind DSP are quite complex and beyond the scope of this description. However, the basic premise behind DSP involves clarifying, or standardizing, the levels or states of a digital signal. A DSP circuit is able to differentiate between human-made signals, which are orderly, and noise, which is inherently random or chaotic.
All communications circuits contain some noise. Such is the case whether the signals are analog or digital, and regardless of the type of information conveyed. Practitioners in the field are continually striving to find new ways to improve the signal-to-noise (S/N) ratio in communications systems. Traditional methods of optimizing the S/N ratio include increasing the transmitted signal power and increasing the receiver sensitivity. In wireless systems, specialized antenna configurations are also used. Digital signal processing dramatically improves the sensitivity of a receiving unit. The effect is most noticeable when noise competes with a desired signal. A good DSP circuit can greatly improve the S/N ratio, but there are limits as to what the circuit can do. If the noise is so strong that all traces of the signal are obliterated, then a DSP cannot find any order in the chaos, and no signal will be received.
If the incoming signal is analog, for example from a standard television broadcast station, the signal is first converted to digital form by an analog-to-digital converter (ADC). The resulting digital signal has two or more levels. Ideally, these levels are always predictable voltages or currents. However, because the incoming signal contains noise, the levels are not always at the standard values. In general terms, the DSP adjusts the levels so that they are at the correct values. This essentially eliminates the noise components in the signal. The DSP acts directly on the incoming signal, thereby eliminating irregularities caused by noise, and thereby minimizing the number of errors per unit time.
The proliferation of portable computers and computing devices in today""s society has increased the demand for transmission of data over wireless links. Binary data, composed (for instance) of sharp xe2x80x9cone to zeroxe2x80x9d and xe2x80x9czero to onexe2x80x9d transitions, results in a spectrum rich in harmonic content that is not well suited to radio frequency (RF) transmission. Hence, the field of digital modulation has been providing various transmission solutions. Recent standards such as Cellular Digital Packet Data (CDPD) and Mobitex (Mobitex is a trademark owned by Telia Corporation) specify Gaussian filtered Minimum Shift Keying (GMSK) for their modulation method. Other modulation techniques include frequency shift keying (FSK), multi-level frequency shift keying (MFSK), continuous phase frequency shift keying (CPFSK), minimum shift keying (MSK), tamed frequency modulation (TFM), phase shift keying (PSK), quadrature phase shift keying (QPSK), differential quadrature phase shift keying (DQPSK), Pi/4 DQPSK, quadrature amplitude modulation (QAM).
Referring now to FIG. 1a, a radio station 110 is shown transmitting a signal 112 to a receiving device 114. The modulation technique shown includes GMSK 116 with a BT of 0.3. Typical data rates of the link include 8000 bps (bits per second), which translates to a bandwidth of approximately 2400 Hz. The frequency affects the amount of intersymbol interference (ISI) associated with the signal. FIG. 1b shows a block diagram of the data sequence 120 which generally comprises such a transmission. The first 16 bits are bit sync information 122. The second 16 bits are frame sync information 124. The next 24 bits are the frame head. The last sequence of bits comprise the data blocks 126, which might number from 1 to 32. FIG. 1c shows a representative data block 130 which includes 12 columns (132) by 20 rows (134) of data bits. Each row includes 8 data bits 136 and 4 parity bits 138, which further represents a (12,8) Hamming code. 18 bytes are generated and then the final two bytes 140 and 142 are CRC""s (or cyclic redundancy checking).
FIG. 2 shows a block diagram 200 for generating and providing error correction on a data block transmitted via a modulation technique. An analog input 202 is fed into an ADC 204 to produce an 8 bit data value. An equalizer 206 typically applies 16 bit DSP operations on the incoming data value to remove ISI. DSP equalizer systems have become ubiquitous in many diverse applications including voice, data, and video communications via various transmission media. Typical applications range from acoustic echo cancelers for full-duplex speaker phones to video deghosting systems for terrestrial television broadcasts to signal conditioners for wireline modems and wireless telephony. Equalizer schemes include, for example, decision feedback equalizers (DFE), zero forcing equalizers, and minimum mean square error equalizers (MMSE). The effect of an equalization system is to compensate for transmission-channel impairments such as frequency-dependant phase and amplitude distortion. If the channel impulse response can be defined, a filter (such as FIR, or IIR) can be implemented to counter the ill effects of the channel. The 16 bits of DSP data are then fed into a detector 208 which produces a 1 bit result used to build the data block. Thereafter Forward Error Correction (FEC) is applied, and the CRC""s are used to verify whether the data was received correctly.
FIG. 3 shows an example plot 300 of waveforms for pulsed information which have been transmitted over an analog channel such as a phone line or airwaves. Even though the original signal is a discrete time sequence, the received signal is a continuous time signal. Heuristically, the channel might be considered to act as an analog low-pass filter, thereby spreading or smearing the shape of the impulse train into a continuous signal whose peaks relate to the amplitudes of the original pulses. Mathematically, the operation can be described as a convolution of the pulse sequence by a continuous time channel response. The resulting signal is a function of time (t) and the symbol period (T). The signal consists of the sum of many scaled and shifted continuous time system impulse responses. The impulse responses are scaled by the amplitudes of the transmitted pulses.
In FIG. 3, a data transmission of example bits 1, 0, 1 might be represented by the summation of the three waveforms 302, 304, and 306. Each of the waveform elements (e.g. 302) could be represented, in its simplest form, as a +n or xe2x88x92n level spanning only a single symbol period T. However, this manner of transmission uses significant bandwidth. To get more information, but use less bandwidth, the signal element will instead be made to spread out and span (for example) 3 symbol periods. At each sample period, the various waveforms are summed to produce the resulting waveform. When ISI is present, the symbols interfere with each other and create difficulties in reconstructing the summed wave. ISI is particularly difficult to remove for sample periods (e.g. 308) where 2 or more waveforms are providing contributions to the summed result.
Prior solutions have used the equalizer element to attempt to remove ISI effects from the modulated data. The ultimate design and functionality of the equalizer depends, among other things, upon proper modeling of the channel impulse response. The equalizer then derives subtraction components at each of the sampling points to produce the proper waveform result. Equalizer design has proven to be difficult, often inaccurate, and certain implementations are processor resource intensive.
Hence, what is needed in the field is a method or solution which provides a significant improvement in error correction rates, and yet saves processor resources. The solution should use information relating to the entire data block, rather than equalizer/filter solutions tied to the channel response, in order to minimize data block errors.
The present invention provides a method for minimizing errors in a modulated signal transmitted over a transmission medium. The method is applied to the entire data block, thereby incorporating information about the parities of each row of data and the data block CRC""s to fix and correct the errors in the block. Thereafter ISI removal is applied on a row by row basis, with such corrections being applied via soft decision coding. In particular, the data samples are first collected in a data block (or FEC block). A soft decision buffer holds the samples. An FEC word is created by processing down each row of the soft decision buffer and creating a binary stream out of the sign bits for each table entry. This creates an estimate of the word by thresholding it around the zero level. A syndrome is generated via a comparison of the parity bits for each FEC word. The syndrome provides the most likely bit position errors, represented by offsets into the FEC word. The position errors map back into the array of soft decision buffer entries and the absolute value of the entries are summed for each corresponding position. This produces sets of numbers and the set with the smallest value is used to determine the error pattern. The bits believed to be in error are flipped in the FEC word. ISI removal is applied to the soft decision buffer on a row-by-row basis (excluding the first row) after FEC decoding to create an intermediate data frame, referred to as the Rx Frame. Upon completion, the process is repeated in the other direction for all of the rows on a row-by-row basis, except the last row. Upon completion, the data block errors will be minimized and the received block should match the transmitted block. The process therefore provides minimal data block errors, but at the same time uses less processing resources.
Accordingly, an aspect of the present invention is to provide a method of extracting bits from modulated waveforms, the method comprising the steps of: receiving analog data; converting the analog data to digital data; generating a sample table having entries arranged in rows, wherein each entry has multiple bits corresponding to the amplitude of the sampled bit at a symbol time; for each row except the first row, proceeding from the top to the bottom of the sample table, creating an estimate by thresholding around the zero level; generating a most likely bit error pattern from the samples and flipping the erroneous bits; performing intersymbol interference (ISI) level adjustment as derived from the previously processed row; and repeating for each row in the reverse direction except the last row, as going from the bottom to the top of the sample table.
Yet another aspect of the present invention is to provide the method described above wherein an intermediate data frame is used to perform ISI level adjustment as derived from the previously processed row.
Still another aspect of the present invention is provide the method described above wherein after converting the analog data to digital data, the additional step of removing direct current (DC) components is applied.
Another aspect of the present invention is to provide the method described above wherein the steps of creating an estimate by thresholding around the zero level and generating a most likely bit error pattern are further comprised of: deriving an FEC word from a row of sample entries which includes data bits and parity bits, and generating a one and two bit error syndrome by XORing the parity bits of the FEC word with parity bits derived from a look-up table using the FEC word data bits.
Yet another aspect of the present invention is to provide the method described above wherein the error syndrome further includes 2 bit error positions.
Still another aspect of the present invention is to provide the method described above wherein the steps further include: mapping each error syndrome into the sample table entries and summing the absolute values of the corresponding table entries to form a list of numbers.
Still another aspect of the present invention is to provide the method described above wherein the steps further include: determining the smallest number in the list and using it as the most likely error pattern, wherein the bits are flipped in the FEC word.
Other aspects and advantages of the present invention can be seen upon review of the figures, the detailed description, and the claims which follow.